Loading lib_com/basop_util.c +12 −11 Original line number Diff line number Diff line Loading @@ -936,13 +936,14 @@ Word32 div_w( Word32 L_num, Word32 L_den ) Word16 iteration; if ( L_den == (Word32) 0 ) IF( L_den == 0 ) { /* printf("Division by 0 in div_l, Fatal error in "); printStack(); */ return ( 0 ); } if ( ( L_num < (Word32) 0 ) || ( L_den < (Word32) 0 ) ) test(); IF( ( L_num < 0 ) || ( L_den < 0 ) ) { /* printf("Division Error in div_l, Fatal error in "); printStack(); */ return ( 0 ); Loading @@ -951,24 +952,24 @@ Word32 div_w( Word32 L_num, Word32 L_den ) W_num = W_deposit32_h( L_num ); W_den = W_deposit32_h( L_den ); if ( W_num >= W_den ) IF( W_sub( W_num, W_den ) >= 0 ) { return MAX_32; } else ELSE { W_num = W_shr( W_num, (Word16) 1 ); W_den = W_shr( W_den, (Word16) 1 ); W_num = W_shr( W_num, 1 ); W_den = W_shr( W_den, 1 ); for ( iteration = (Word16) 0; iteration < (Word16) 31; iteration++ ) FOR( iteration = 0; iteration < 31; iteration++ ) { L_var_out = L_shl( L_var_out, (Word16) 1 ); W_num = W_shl( W_num, (Word16) 1 ); L_var_out = L_shl( L_var_out, 1 ); W_num = W_shl( W_num, 1 ); if ( W_num >= W_den ) IF( W_sub( W_num, W_den ) >= 0 ) { W_num = W_sub( W_num, W_den ); L_var_out = L_add( L_var_out, (Word32) 1 ); L_var_out = L_add( L_var_out, 1 ); } } Loading lib_com/bitstream_fx.c +7 −7 Original line number Diff line number Diff line Loading @@ -1121,7 +1121,7 @@ void dec_prm_core( Decoder_State *st ) } /* Get bandwidth mode */ st->bwidth = get_next_indice( st, FrameSizeConfig[frame_size_index].bandwidth_bits ); st->bwidth = get_next_indice_fx( st, FrameSizeConfig[frame_size_index].bandwidth_bits ); move16(); st->bwidth = add( st->bwidth, FrameSizeConfig[frame_size_index].bandwidth_min ); Loading @@ -1147,11 +1147,11 @@ void dec_prm_core( Decoder_State *st ) /* Skip reserved bit */ get_next_indice_tmp_fx( st, FrameSizeConfig[frame_size_index].reserved_bits ); IF( get_next_indice_1( st ) != 0 ) /* TCX */ IF( get_next_indice_1_fx( st ) != 0 ) /* TCX */ { st->core = TCX_20_CORE; move16(); if ( get_next_indice_1( st ) != 0 ) if ( get_next_indice_1_fx( st ) != 0 ) { st->core = HQ_CORE; move16(); Loading Loading @@ -1214,7 +1214,7 @@ void decision_matrix_core_dec( ELSE IF( GE_32( st->total_brate, ACELP_24k40 ) && LE_32( st->total_brate, ACELP_64k ) ) { /* read the ACELP/HQ core selection bit */ st->core = imult1616( get_next_indice( st, 1 ), HQ_CORE ); st->core = imult1616( get_next_indice_fx( st, 1 ), HQ_CORE ); move16(); } ELSE Loading Loading @@ -1245,7 +1245,7 @@ void decision_matrix_core_dec( start_idx = add( start_idx, 1 ); /* retrieve the signalling indice */ ind = acelp_sig_tbl[add( start_idx, get_next_indice( st, nBits ) )]; ind = acelp_sig_tbl[add( start_idx, get_next_indice_fx( st, nBits ) )]; st->bwidth = extract_l( L_and( L_shr( ind, 3 ), 0x7 ) ); move16(); Loading @@ -1265,7 +1265,7 @@ void decision_matrix_core_dec( IF( EQ_16( st->core, HQ_CORE ) ) { /* read the HQ/TCX core switching flag */ if ( get_next_indice( st, 1 ) != 0 ) if ( get_next_indice_fx( st, 1 ) != 0 ) { st->core = TCX_20_CORE; move16(); Loading @@ -1275,7 +1275,7 @@ void decision_matrix_core_dec( test(); IF( EQ_16( st->core, TCX_20_CORE ) && GT_32( st->total_brate, ACELP_16k40 ) ) { ind = get_next_indice( st, 2 ); ind = get_next_indice_fx( st, 2 ); IF( ind == 0 ) { Loading lib_com/fd_cng_com.c +1 −1 Original line number Diff line number Diff line Loading @@ -109,7 +109,7 @@ void initFdCngCom_flt( set_f( hFdCngCom->A_cng_flt, 0.0f, M + 1 ); hFdCngCom->A_cng_flt[0] = 1.f; #ifdef IVAS_FLOAT_FIXED set_s( hFdCngCom->A_cng, 0, M + 1 ); set16_fx( hFdCngCom->A_cng, 0, M + 1 ); hFdCngCom->A_cng[0] = MAX_16; #endif Loading lib_com/gs_bitallocation_ivas_fx.c +1 −1 Original line number Diff line number Diff line Loading @@ -1044,7 +1044,7 @@ void bands_and_bit_alloc_ivas_fx( } ELSE /* *bit == 0 */ { set_s( out_bits_per_bands, 0, nb_tot_bands ); set16_fx( out_bits_per_bands, 0, nb_tot_bands ); *nb_subbands = 0; move16(); *pvq_len = 0; Loading lib_com/hq2_bit_alloc.c +7 −6 Original line number Diff line number Diff line Loading @@ -38,6 +38,7 @@ #include "options.h" #include <math.h> #include "prot.h" #include "prot_fx.h" #include "rom_com.h" #include "basop_util.h" #include "stl.h" Loading @@ -61,7 +62,7 @@ #define BITS_FACT_0p92 ( Word16 )( 0.92f * (float) pow( 2, Qbf ) + 0.5f ) #define L_Comp( hi, lo ) L_mac( L_deposit_h( hi ), lo, 1 ) #if 0 // functions already present in hq2_bit_alloc_fx.c /*------------------------------------------------------------------- * div_s_ss() * Loading Loading @@ -308,7 +309,7 @@ static void Bits2indvsb_fx( return; } #endif /*-------------------------------------------------------------------* * hq2_bit_alloc_har() * Loading Loading @@ -388,7 +389,7 @@ void hq2_bit_alloc_har( L_THR2 = L_shl( L_deposit_l( THR2 ), SWB_BWE_LR_QRk ); L_THR3 = L_shl( L_deposit_l( THR3 ), SWB_BWE_LR_QRk ); set_val_Word16( Bits_grp_fx, 0, GRP_SB ); set16_fx( Bits_grp_fx, 0, GRP_SB ); /* Initialize subbands bits allocation vector based on harmonic bands */ harmonic_band_fx = add( sub( N_fx, p2a_bands_fx ), 1 ); Loading Loading @@ -739,10 +740,10 @@ void hq2_bit_alloc_har( } ELSE { set_val_Word32( L_Rsubband + grp_bound_fx[i], 0x0L, sub( grp_bound_fx[i + 1], grp_bound_fx[i] ) ); set32_fx( L_Rsubband + grp_bound_fx[i], 0x0L, sub( grp_bound_fx[i + 1], grp_bound_fx[i] ) ); IF( sub( i, GRP_SB - 1 ) == 0 ) { set_val_Word16( p2a_flags_fx + grp_bound_fx[i], 0, sub( grp_bound_fx[i + 1], grp_bound_fx[i] ) ); set16_fx( p2a_flags_fx + grp_bound_fx[i], 0, sub( grp_bound_fx[i + 1], grp_bound_fx[i] ) ); } } } Loading Loading @@ -803,7 +804,7 @@ void hq2_bit_alloc( /* Init Rk to non-zero values for bands to be allocated bits */ IF( sub( num_bits, HQ_16k40_BIT ) <= 0 ) { set_val_Word32( L_Rk, (Word32) ( C1_QRk ), bands ); /* 1<<SWB_BWE_LR_QRk */ set32_fx( L_Rk, (Word32) ( C1_QRk ), bands ); /* 1<<SWB_BWE_LR_QRk */ test(); IF( is_transient && sub( bands, 32 ) == 0 ) Loading Loading
lib_com/basop_util.c +12 −11 Original line number Diff line number Diff line Loading @@ -936,13 +936,14 @@ Word32 div_w( Word32 L_num, Word32 L_den ) Word16 iteration; if ( L_den == (Word32) 0 ) IF( L_den == 0 ) { /* printf("Division by 0 in div_l, Fatal error in "); printStack(); */ return ( 0 ); } if ( ( L_num < (Word32) 0 ) || ( L_den < (Word32) 0 ) ) test(); IF( ( L_num < 0 ) || ( L_den < 0 ) ) { /* printf("Division Error in div_l, Fatal error in "); printStack(); */ return ( 0 ); Loading @@ -951,24 +952,24 @@ Word32 div_w( Word32 L_num, Word32 L_den ) W_num = W_deposit32_h( L_num ); W_den = W_deposit32_h( L_den ); if ( W_num >= W_den ) IF( W_sub( W_num, W_den ) >= 0 ) { return MAX_32; } else ELSE { W_num = W_shr( W_num, (Word16) 1 ); W_den = W_shr( W_den, (Word16) 1 ); W_num = W_shr( W_num, 1 ); W_den = W_shr( W_den, 1 ); for ( iteration = (Word16) 0; iteration < (Word16) 31; iteration++ ) FOR( iteration = 0; iteration < 31; iteration++ ) { L_var_out = L_shl( L_var_out, (Word16) 1 ); W_num = W_shl( W_num, (Word16) 1 ); L_var_out = L_shl( L_var_out, 1 ); W_num = W_shl( W_num, 1 ); if ( W_num >= W_den ) IF( W_sub( W_num, W_den ) >= 0 ) { W_num = W_sub( W_num, W_den ); L_var_out = L_add( L_var_out, (Word32) 1 ); L_var_out = L_add( L_var_out, 1 ); } } Loading
lib_com/bitstream_fx.c +7 −7 Original line number Diff line number Diff line Loading @@ -1121,7 +1121,7 @@ void dec_prm_core( Decoder_State *st ) } /* Get bandwidth mode */ st->bwidth = get_next_indice( st, FrameSizeConfig[frame_size_index].bandwidth_bits ); st->bwidth = get_next_indice_fx( st, FrameSizeConfig[frame_size_index].bandwidth_bits ); move16(); st->bwidth = add( st->bwidth, FrameSizeConfig[frame_size_index].bandwidth_min ); Loading @@ -1147,11 +1147,11 @@ void dec_prm_core( Decoder_State *st ) /* Skip reserved bit */ get_next_indice_tmp_fx( st, FrameSizeConfig[frame_size_index].reserved_bits ); IF( get_next_indice_1( st ) != 0 ) /* TCX */ IF( get_next_indice_1_fx( st ) != 0 ) /* TCX */ { st->core = TCX_20_CORE; move16(); if ( get_next_indice_1( st ) != 0 ) if ( get_next_indice_1_fx( st ) != 0 ) { st->core = HQ_CORE; move16(); Loading Loading @@ -1214,7 +1214,7 @@ void decision_matrix_core_dec( ELSE IF( GE_32( st->total_brate, ACELP_24k40 ) && LE_32( st->total_brate, ACELP_64k ) ) { /* read the ACELP/HQ core selection bit */ st->core = imult1616( get_next_indice( st, 1 ), HQ_CORE ); st->core = imult1616( get_next_indice_fx( st, 1 ), HQ_CORE ); move16(); } ELSE Loading Loading @@ -1245,7 +1245,7 @@ void decision_matrix_core_dec( start_idx = add( start_idx, 1 ); /* retrieve the signalling indice */ ind = acelp_sig_tbl[add( start_idx, get_next_indice( st, nBits ) )]; ind = acelp_sig_tbl[add( start_idx, get_next_indice_fx( st, nBits ) )]; st->bwidth = extract_l( L_and( L_shr( ind, 3 ), 0x7 ) ); move16(); Loading @@ -1265,7 +1265,7 @@ void decision_matrix_core_dec( IF( EQ_16( st->core, HQ_CORE ) ) { /* read the HQ/TCX core switching flag */ if ( get_next_indice( st, 1 ) != 0 ) if ( get_next_indice_fx( st, 1 ) != 0 ) { st->core = TCX_20_CORE; move16(); Loading @@ -1275,7 +1275,7 @@ void decision_matrix_core_dec( test(); IF( EQ_16( st->core, TCX_20_CORE ) && GT_32( st->total_brate, ACELP_16k40 ) ) { ind = get_next_indice( st, 2 ); ind = get_next_indice_fx( st, 2 ); IF( ind == 0 ) { Loading
lib_com/fd_cng_com.c +1 −1 Original line number Diff line number Diff line Loading @@ -109,7 +109,7 @@ void initFdCngCom_flt( set_f( hFdCngCom->A_cng_flt, 0.0f, M + 1 ); hFdCngCom->A_cng_flt[0] = 1.f; #ifdef IVAS_FLOAT_FIXED set_s( hFdCngCom->A_cng, 0, M + 1 ); set16_fx( hFdCngCom->A_cng, 0, M + 1 ); hFdCngCom->A_cng[0] = MAX_16; #endif Loading
lib_com/gs_bitallocation_ivas_fx.c +1 −1 Original line number Diff line number Diff line Loading @@ -1044,7 +1044,7 @@ void bands_and_bit_alloc_ivas_fx( } ELSE /* *bit == 0 */ { set_s( out_bits_per_bands, 0, nb_tot_bands ); set16_fx( out_bits_per_bands, 0, nb_tot_bands ); *nb_subbands = 0; move16(); *pvq_len = 0; Loading
lib_com/hq2_bit_alloc.c +7 −6 Original line number Diff line number Diff line Loading @@ -38,6 +38,7 @@ #include "options.h" #include <math.h> #include "prot.h" #include "prot_fx.h" #include "rom_com.h" #include "basop_util.h" #include "stl.h" Loading @@ -61,7 +62,7 @@ #define BITS_FACT_0p92 ( Word16 )( 0.92f * (float) pow( 2, Qbf ) + 0.5f ) #define L_Comp( hi, lo ) L_mac( L_deposit_h( hi ), lo, 1 ) #if 0 // functions already present in hq2_bit_alloc_fx.c /*------------------------------------------------------------------- * div_s_ss() * Loading Loading @@ -308,7 +309,7 @@ static void Bits2indvsb_fx( return; } #endif /*-------------------------------------------------------------------* * hq2_bit_alloc_har() * Loading Loading @@ -388,7 +389,7 @@ void hq2_bit_alloc_har( L_THR2 = L_shl( L_deposit_l( THR2 ), SWB_BWE_LR_QRk ); L_THR3 = L_shl( L_deposit_l( THR3 ), SWB_BWE_LR_QRk ); set_val_Word16( Bits_grp_fx, 0, GRP_SB ); set16_fx( Bits_grp_fx, 0, GRP_SB ); /* Initialize subbands bits allocation vector based on harmonic bands */ harmonic_band_fx = add( sub( N_fx, p2a_bands_fx ), 1 ); Loading Loading @@ -739,10 +740,10 @@ void hq2_bit_alloc_har( } ELSE { set_val_Word32( L_Rsubband + grp_bound_fx[i], 0x0L, sub( grp_bound_fx[i + 1], grp_bound_fx[i] ) ); set32_fx( L_Rsubband + grp_bound_fx[i], 0x0L, sub( grp_bound_fx[i + 1], grp_bound_fx[i] ) ); IF( sub( i, GRP_SB - 1 ) == 0 ) { set_val_Word16( p2a_flags_fx + grp_bound_fx[i], 0, sub( grp_bound_fx[i + 1], grp_bound_fx[i] ) ); set16_fx( p2a_flags_fx + grp_bound_fx[i], 0, sub( grp_bound_fx[i + 1], grp_bound_fx[i] ) ); } } } Loading Loading @@ -803,7 +804,7 @@ void hq2_bit_alloc( /* Init Rk to non-zero values for bands to be allocated bits */ IF( sub( num_bits, HQ_16k40_BIT ) <= 0 ) { set_val_Word32( L_Rk, (Word32) ( C1_QRk ), bands ); /* 1<<SWB_BWE_LR_QRk */ set32_fx( L_Rk, (Word32) ( C1_QRk ), bands ); /* 1<<SWB_BWE_LR_QRk */ test(); IF( is_transient && sub( bands, 32 ) == 0 ) Loading