Loading lib_com/lsf_tools.c +0 −52 Original line number Diff line number Diff line Loading @@ -2828,58 +2828,6 @@ void extend_dctN_input( return; } #ifdef IVAS_FLOAT_FIXED void extend_dctN_input_fx( const Word32 *input, /* i : input in fdcng domain -> Q */ const Word32 *dct_input, /* i : input in dctN(fdcng) domain -> Q */ const Word16 in_dim, /* i : in_dim == N */ Word32 *ext_sig, /* o : extended output in fdcng domain Q */ const Word16 out_dim, /* i : output total dim */ Word32 *matrix, /* i : idct synthesis matrix N rows, n_cols columns -> Q31*/ const Word16 n_cols, /* i : number of columns == DCT truncation length */ const DCTTYPE dcttype /* i : matrix operation type */ ) { Word16 i, j, i_rev; const Word32( *ptr )[FDCNG_VQ_DCT_MAXTRUNC] = (void *) matrix; /* stored format is an IDCT_Nx(FDCNG_VQ_DCT_MAXTRUNC) matrix */ assert( in_dim < FDCNG_VQ_MAX_LEN ); assert( out_dim <= FDCNG_VQ_MAX_LEN ); assert( out_dim > in_dim ); assert( n_cols == FDCNG_VQ_DCT_MAXTRUNC ); /* for *ptr[MAX_TRUNC] adressing*/ assert( ( dcttype & 1 ) != 0 ); /* idct tables always in use for this basis vector extension */ Copy32( input, ext_sig, in_dim ); /* copy initial part, i.e. only last/tail parts are extended */ set32_fx( &( ext_sig[in_dim] ), 0, out_dim - in_dim ); i_rev = in_dim; /*ptr init*/ move16(); FOR( i = in_dim; i < out_dim; i++ ) { /* for each extension sample */ /* i = 21 22 23; i_rev = 20 19 18; for odd dctII reflect basis vector */ i_rev = sub( i_rev, 1 ); FOR( j = 0; j < n_cols; j++ ) /* for each available DCT coeff */ { /* DCTcoeff * reflected basis vector */ #define WMC_TOOL_SKIP /* pure ptr MAC operations */ ext_sig[i] = L_add( ext_sig[i], Mpy_32_32( dct_input[j], ptr[i_rev][j] ) ); /* sum up scaled and extended basis vector */ move32(); // Q31 + Q - Q31 -> Q MAC( 1 ); #undef WMC_TOOL_SKIP } } return; } #endif /*-------------------------------------------------------------------* * create_IDCT_N_Matrix() Loading lib_com/prot_fx.h +0 −11 Original line number Diff line number Diff line Loading @@ -9886,17 +9886,6 @@ void dctT2_N_apply_matrix_fx( const DCTTYPE dcttype /* i : matrix operation type */ ); void extend_dctN_input_fx( const Word32 *input, /* i : input in fdcng domain */ const Word32 *dct_input, /* i : input in dctN(fdcng) domain */ const Word16 in_dim, /* i : in_dim == N */ Word32 *ext_sig, /* o : extended output in fdcng domain */ const Word16 out_dim, /* i : output total dim */ Word32 *matrix, /* i : idct synthesis matrix N rows, n_cols columns */ const Word16 n_cols, /* i : number of columns == DCT truncation length */ const DCTTYPE dcttype /* i : matrix operation type */ ); Word32 sum2_f_32_fx( const Word32 *vec, /* i : input vector */ const int16_t lvec, /* i : length of input vector */ Loading lib_enc/fd_cng_enc.c +2 −27 Original line number Diff line number Diff line Loading @@ -46,7 +46,7 @@ #include "ivas_prot_fx.h" #include "stat_enc.h" #include "wmc_auto.h" #include "ivas_prot_fx.h" /*-------------------------------------------------------------------* * createFdCngEnc() * Loading Loading @@ -522,16 +522,6 @@ void FdCng_encodeSID( N = hFdCngEnc->npartDec; invTrfMatrix = (float *) tmpRAM; /* dynamically filled */ #ifdef IVAS_FLOAT_FIXED Word32 *invTrfMatrix_fx; Word32 tmpRAM_fx[FDCNG_VQ_MAX_LEN][FDCNG_VQ_DCT_MAXTRUNC]; Word32 v_fx[32]; invTrfMatrix_fx = (Word32 *) tmpRAM_fx; Word32 dct_target_fx[FDCNG_VQ_DCT_MAXTRUNC]; Word32 tot_sig_ext_fx[FDCNG_VQ_MAX_LEN]; #endif set_zero( v, FDCNG_VQ_MAX_LEN ); /* Convert to LOG */ Loading Loading @@ -569,24 +559,10 @@ void FdCng_encodeSID( { create_IDCT_N_Matrix( invTrfMatrix, N, FDCNG_VQ_DCT_MAXTRUNC, sizeof( tmpRAM ) / ( sizeof( float ) ) ); /* truncated DCT21 analysis */ #ifdef IVAS_FLOAT_FIXED Word16 Q = 24; move16(); create_IDCT_N_Matrix_fx( invTrfMatrix_fx, N, FDCNG_VQ_DCT_MAXTRUNC, sizeof( tmpRAM_fx ) / ( sizeof( Word32 ) ) ); // Q31 #endif dctT2_N_apply_matrix( (const float *) v, dct_target, FDCNG_VQ_DCT_MAXTRUNC, N, invTrfMatrix, FDCNG_VQ_DCT_MAXTRUNC, DCT_T2_21_XX ); /* truncated IDCT21 extension to 24 bands */ #ifdef IVAS_FLOAT_FIXED floatToFixed_arr32( v, v_fx, Q, N ); floatToFixed_arr32( dct_target, dct_target_fx, Q, FDCNG_VQ_DCT_MAXTRUNC ); extend_dctN_input_fx( v_fx, dct_target_fx, N, tot_sig_ext_fx, FDCNG_VQ_MAX_LEN, invTrfMatrix_fx, FDCNG_VQ_DCT_MAXTRUNC, IDCT_T2_XX_21 ); fixedToFloat_arrL( tot_sig_ext_fx, tot_sig_ext, Q, N ); #else extend_dctN_input( v, dct_target, N, tot_sig_ext, FDCNG_VQ_MAX_LEN, invTrfMatrix, FDCNG_VQ_DCT_MAXTRUNC, IDCT_T2_XX_21 ); #endif mvr2r( tot_sig_ext, v, FDCNG_VQ_MAX_LEN ); /* write extended result as input to VQ stage #1 */ } create_IDCT_N_Matrix( invTrfMatrix, FDCNG_VQ_MAX_LEN, FDCNG_VQ_DCT_MAXTRUNC, sizeof( tmpRAM ) / ( sizeof( float ) ) ); Loading Loading @@ -1345,7 +1321,6 @@ void FdCngEncodeDiracMDCTStereoSID( /* truncated DCT 21 analysis */ dctT2_N_apply_matrix( (const float *) ms_ptr[0], dct_target, FDCNG_VQ_DCT_MAXTRUNC, N[0], invTrfMatrix, FDCNG_VQ_DCT_MAXTRUNC, DCT_T2_21_XX ); /* truncated IDCT21 extension to 24 synthesis */ extend_dctN_input( ms_ptr[0], dct_target, N[0], tot_sig_ext, FDCNG_VQ_MAX_LEN, invTrfMatrix, FDCNG_VQ_DCT_MAXTRUNC, IDCT_T2_XX_21 ); /* use 18 basis vectors*/ mvr2r( tot_sig_ext, ms_ptr[0], FDCNG_VQ_MAX_LEN ); /* write extended result as input to VQ stage #1 */ Loading Loading
lib_com/lsf_tools.c +0 −52 Original line number Diff line number Diff line Loading @@ -2828,58 +2828,6 @@ void extend_dctN_input( return; } #ifdef IVAS_FLOAT_FIXED void extend_dctN_input_fx( const Word32 *input, /* i : input in fdcng domain -> Q */ const Word32 *dct_input, /* i : input in dctN(fdcng) domain -> Q */ const Word16 in_dim, /* i : in_dim == N */ Word32 *ext_sig, /* o : extended output in fdcng domain Q */ const Word16 out_dim, /* i : output total dim */ Word32 *matrix, /* i : idct synthesis matrix N rows, n_cols columns -> Q31*/ const Word16 n_cols, /* i : number of columns == DCT truncation length */ const DCTTYPE dcttype /* i : matrix operation type */ ) { Word16 i, j, i_rev; const Word32( *ptr )[FDCNG_VQ_DCT_MAXTRUNC] = (void *) matrix; /* stored format is an IDCT_Nx(FDCNG_VQ_DCT_MAXTRUNC) matrix */ assert( in_dim < FDCNG_VQ_MAX_LEN ); assert( out_dim <= FDCNG_VQ_MAX_LEN ); assert( out_dim > in_dim ); assert( n_cols == FDCNG_VQ_DCT_MAXTRUNC ); /* for *ptr[MAX_TRUNC] adressing*/ assert( ( dcttype & 1 ) != 0 ); /* idct tables always in use for this basis vector extension */ Copy32( input, ext_sig, in_dim ); /* copy initial part, i.e. only last/tail parts are extended */ set32_fx( &( ext_sig[in_dim] ), 0, out_dim - in_dim ); i_rev = in_dim; /*ptr init*/ move16(); FOR( i = in_dim; i < out_dim; i++ ) { /* for each extension sample */ /* i = 21 22 23; i_rev = 20 19 18; for odd dctII reflect basis vector */ i_rev = sub( i_rev, 1 ); FOR( j = 0; j < n_cols; j++ ) /* for each available DCT coeff */ { /* DCTcoeff * reflected basis vector */ #define WMC_TOOL_SKIP /* pure ptr MAC operations */ ext_sig[i] = L_add( ext_sig[i], Mpy_32_32( dct_input[j], ptr[i_rev][j] ) ); /* sum up scaled and extended basis vector */ move32(); // Q31 + Q - Q31 -> Q MAC( 1 ); #undef WMC_TOOL_SKIP } } return; } #endif /*-------------------------------------------------------------------* * create_IDCT_N_Matrix() Loading
lib_com/prot_fx.h +0 −11 Original line number Diff line number Diff line Loading @@ -9886,17 +9886,6 @@ void dctT2_N_apply_matrix_fx( const DCTTYPE dcttype /* i : matrix operation type */ ); void extend_dctN_input_fx( const Word32 *input, /* i : input in fdcng domain */ const Word32 *dct_input, /* i : input in dctN(fdcng) domain */ const Word16 in_dim, /* i : in_dim == N */ Word32 *ext_sig, /* o : extended output in fdcng domain */ const Word16 out_dim, /* i : output total dim */ Word32 *matrix, /* i : idct synthesis matrix N rows, n_cols columns */ const Word16 n_cols, /* i : number of columns == DCT truncation length */ const DCTTYPE dcttype /* i : matrix operation type */ ); Word32 sum2_f_32_fx( const Word32 *vec, /* i : input vector */ const int16_t lvec, /* i : length of input vector */ Loading
lib_enc/fd_cng_enc.c +2 −27 Original line number Diff line number Diff line Loading @@ -46,7 +46,7 @@ #include "ivas_prot_fx.h" #include "stat_enc.h" #include "wmc_auto.h" #include "ivas_prot_fx.h" /*-------------------------------------------------------------------* * createFdCngEnc() * Loading Loading @@ -522,16 +522,6 @@ void FdCng_encodeSID( N = hFdCngEnc->npartDec; invTrfMatrix = (float *) tmpRAM; /* dynamically filled */ #ifdef IVAS_FLOAT_FIXED Word32 *invTrfMatrix_fx; Word32 tmpRAM_fx[FDCNG_VQ_MAX_LEN][FDCNG_VQ_DCT_MAXTRUNC]; Word32 v_fx[32]; invTrfMatrix_fx = (Word32 *) tmpRAM_fx; Word32 dct_target_fx[FDCNG_VQ_DCT_MAXTRUNC]; Word32 tot_sig_ext_fx[FDCNG_VQ_MAX_LEN]; #endif set_zero( v, FDCNG_VQ_MAX_LEN ); /* Convert to LOG */ Loading Loading @@ -569,24 +559,10 @@ void FdCng_encodeSID( { create_IDCT_N_Matrix( invTrfMatrix, N, FDCNG_VQ_DCT_MAXTRUNC, sizeof( tmpRAM ) / ( sizeof( float ) ) ); /* truncated DCT21 analysis */ #ifdef IVAS_FLOAT_FIXED Word16 Q = 24; move16(); create_IDCT_N_Matrix_fx( invTrfMatrix_fx, N, FDCNG_VQ_DCT_MAXTRUNC, sizeof( tmpRAM_fx ) / ( sizeof( Word32 ) ) ); // Q31 #endif dctT2_N_apply_matrix( (const float *) v, dct_target, FDCNG_VQ_DCT_MAXTRUNC, N, invTrfMatrix, FDCNG_VQ_DCT_MAXTRUNC, DCT_T2_21_XX ); /* truncated IDCT21 extension to 24 bands */ #ifdef IVAS_FLOAT_FIXED floatToFixed_arr32( v, v_fx, Q, N ); floatToFixed_arr32( dct_target, dct_target_fx, Q, FDCNG_VQ_DCT_MAXTRUNC ); extend_dctN_input_fx( v_fx, dct_target_fx, N, tot_sig_ext_fx, FDCNG_VQ_MAX_LEN, invTrfMatrix_fx, FDCNG_VQ_DCT_MAXTRUNC, IDCT_T2_XX_21 ); fixedToFloat_arrL( tot_sig_ext_fx, tot_sig_ext, Q, N ); #else extend_dctN_input( v, dct_target, N, tot_sig_ext, FDCNG_VQ_MAX_LEN, invTrfMatrix, FDCNG_VQ_DCT_MAXTRUNC, IDCT_T2_XX_21 ); #endif mvr2r( tot_sig_ext, v, FDCNG_VQ_MAX_LEN ); /* write extended result as input to VQ stage #1 */ } create_IDCT_N_Matrix( invTrfMatrix, FDCNG_VQ_MAX_LEN, FDCNG_VQ_DCT_MAXTRUNC, sizeof( tmpRAM ) / ( sizeof( float ) ) ); Loading Loading @@ -1345,7 +1321,6 @@ void FdCngEncodeDiracMDCTStereoSID( /* truncated DCT 21 analysis */ dctT2_N_apply_matrix( (const float *) ms_ptr[0], dct_target, FDCNG_VQ_DCT_MAXTRUNC, N[0], invTrfMatrix, FDCNG_VQ_DCT_MAXTRUNC, DCT_T2_21_XX ); /* truncated IDCT21 extension to 24 synthesis */ extend_dctN_input( ms_ptr[0], dct_target, N[0], tot_sig_ext, FDCNG_VQ_MAX_LEN, invTrfMatrix, FDCNG_VQ_DCT_MAXTRUNC, IDCT_T2_XX_21 ); /* use 18 basis vectors*/ mvr2r( tot_sig_ext, ms_ptr[0], FDCNG_VQ_MAX_LEN ); /* write extended result as input to VQ stage #1 */ Loading