Commit f683bb94 authored by Sandesh Venkatesh's avatar Sandesh Venkatesh
Browse files

Merge branch '3gpp_issue_968_fix' into 'main'

Fix for 3GPP issue 968: Decoder crash for OMASA ISM4_1TC / ISM4_2TC with bitrate switching and FER in enhancer_ivas_fx2() [allow regression]

See merge request !782
parents a4a9ebfe bc5a73b6
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+18 −34
Original line number Diff line number Diff line
@@ -600,9 +600,11 @@ void enhancer_ivas_fx2(
    Word16 tmp, fac, *pt_exc2;
    Word16 i;
    Word32 L_tmp;
    Word32 L_tmp1, L_tmp2;
    Word16 gain_code_hi;
    Word16 pit_sharp, tmp16;
    Word16 excp[L_SUBFR], sc;
    Word64 w_temp;


    pit_sharp = gain_pit;
@@ -751,50 +753,32 @@ void enhancer_ivas_fx2(
         * filter with coefs [-tmp 1.0 -tmp] where tmp=0...0.25.
         * This is applied to code and add_fxed to exc2
         *-----------------------------------------------------------------*/

        L_tmp1 = L_deposit_h( gain_code_hi ); // Q = 16 + Q_exc, gain_code
        L_tmp2 = L_mult( tmp, gain_code_hi ); // Q = 16 + Q_exc, gain_code * temp

        /* pt_exc2[0] += code[0] - tmp * code[1] */
        L_tmp = L_deposit_h( code[0] );       /* if Enc :Q9 * Q15 -> Q25 */
        L_tmp = L_msu( L_tmp, code[1], tmp ); /* Q12 * Q15 -> Q28 */
#ifdef BASOP_NOGLOB
        L_tmp = L_shl_sat( L_mult( gain_code_hi, extract_h( L_tmp ) ), sc );
        pt_exc2[0] = msu_r_sat( L_tmp, -32768, pt_exc2[0] );
        w_temp = W_msu_32_16( W_mult_32_16( L_tmp1, code[0] ), L_tmp2, code[1] ); // Q = 32 + Q_exc - sc (16+Q_exc+15-sc+1)
        w_temp = W_shl( w_temp, sc );                                             // Q = 32 + Q_exc
        pt_exc2[0] = W_round32_s( W_msu_32_16( w_temp, MIN_32, pt_exc2[0] ) );    // Q = Q_exc
        move16();
#else
        L_tmp = L_shl( L_mult( gain_code_hi, extract_h( L_tmp ) ), sc );
        pt_exc2[0] = msu_r( L_tmp, -32768, pt_exc2[0] );
        move16();
#endif
        move16(); /* in Q_exc */

        FOR( i = 1; i < L_SUBFR - 1; i++ )
        {
            /* pt_exc2[i] += code[i] - tmp * code[i-1] - tmp * code[i+1] */
            L_tmp = L_msu( -32768, code[i], -32768 );
            L_tmp = L_msu( L_tmp, code[i + 1], tmp );
#ifdef BASOP_NOGLOB
            tmp16 = msu_r_sat( L_tmp, code[i - 1], tmp );
            L_tmp = L_shl_sat( L_mult( gain_code_hi, tmp16 ), sc );
            pt_exc2[i] = msu_r_sat( L_tmp, -32768, pt_exc2[i] );
            /* pt_exc2[i] += (code[i] - tmp * code[i-1] - tmp * code[i+1]) * gain_code */
            w_temp = W_msu_32_16( W_mult_32_16( L_tmp1, code[i] ), L_tmp2, code[i - 1] ); // Q = 32 + Q_exc - sc (16+Q_exc+15-sc+1)
            w_temp = W_msu_32_16( w_temp, L_tmp2, code[i + 1] );                          // Q = 32 + Q_exc - sc (16+Q_exc+15-sc+1)
            w_temp = W_shl( w_temp, sc );                                                 // Q = 32 + Q_exc
            pt_exc2[i] = W_round32_s( W_msu_32_16( w_temp, MIN_32, pt_exc2[i] ) );        // Q = Q_exc
            move16();
#else
            tmp16 = msu_r( L_tmp, code[i - 1], tmp );
            L_tmp = L_shl( L_mult( gain_code_hi, tmp16 ), sc );
            pt_exc2[i] = msu_r( L_tmp, -32768, pt_exc2[i] );
#endif
            move16(); /* in Q_exc */
        }

        /* pt_exc2[L_SUBFR-1] += code[L_SUBFR-1] - tmp * code[L_SUBFR-2] */
        L_tmp = L_deposit_h( code[L_SUBFR - 1] );       /*Q28 */
        L_tmp = L_msu( L_tmp, code[L_SUBFR - 2], tmp ); /*Q28 */
        L_tmp = L_shl( L_mult( gain_code_hi, extract_h( L_tmp ) ), sc );
#ifdef BASOP_NOGLOB
        pt_exc2[L_SUBFR - 1] = msu_r_sat( L_tmp, -32768, pt_exc2[L_SUBFR - 1] );
        w_temp = W_msu_32_16( W_mult_32_16( L_tmp1, code[L_SUBFR - 1] ), L_tmp2, code[L_SUBFR - 2] ); // Q = 32 + Q_exc - sc (16+Q_exc+15-sc+1)
        w_temp = W_shl( w_temp, sc );                                                                 // Q = 32 + Q_exc
        pt_exc2[L_SUBFR - 1] = W_round32_s( W_msu_32_16( w_temp, MIN_32, pt_exc2[L_SUBFR - 1] ) );    // Q = Q_exc
        move16();
#else
        pt_exc2[L_SUBFR - 1] = msu_r( L_tmp, -32768, pt_exc2[L_SUBFR - 1] );
        move16();
#endif
        move16(); /* in Q_exc */

        test();
        test();
        IF( Opt_AMR_WB && ( EQ_32( core_brate, ACELP_8k85 ) || EQ_32( core_brate, ACELP_6k60 ) ) )