Commit 9f26f8d7 authored by vaclav's avatar vaclav
Browse files

update within NONBE_1214_PLC_LSF_MEMORY

parent d66d1b19

lib_dec/core_switching_dec.c

+2 −3
Original line number Diff line number Diff line
@@ -264,9 +264,8 @@ ivas_error core_switching_pre_dec( 
    }



#ifdef NONBE_1214_PLC_LSF_MEMORY

    if ( ( ( st->core == ACELP_CORE || st->core == AMR_WB_CORE ) && ( st->last_core == HQ_CORE || ( last_element_mode == IVAS_CPE_MDCT && st->core_brate != FRAME_NO_DATA && st->core_brate != SID_2k40 ) ) ) ||

         ( ( st->element_mode == IVAS_CPE_DFT || st->element_mode == IVAS_CPE_TD || ( st->element_mode == IVAS_CPE_MDCT && last_element_mode == IVAS_CPE_DFT ) ) && nchan_out == 2 &&

           st->core_brate != SID_2k40 && st->core_brate != FRAME_NO_DATA && ( last_core_brate_st0 == FRAME_NO_DATA || last_core_brate_st0 == SID_2k40 ) ) )

    if ( ( ( st->core == ACELP_CORE || st->core == AMR_WB_CORE ) && st->last_core == HQ_CORE ) || ( ( st->element_mode == IVAS_CPE_DFT || st->element_mode == IVAS_CPE_TD || ( st->element_mode == IVAS_CPE_MDCT && last_element_mode == IVAS_CPE_DFT ) ) && nchan_out == 2 && st->core_brate != SID_2k40 && st->core_brate != FRAME_NO_DATA && ( last_core_brate_st0 == FRAME_NO_DATA || last_core_brate_st0 == SID_2k40 ) ) ||

         ( st->core == ACELP_CORE && st->last_L_frame > L_FRAME16k && st->L_frame <= L_FRAME16k && st->element_mode > EVS_MONO ) /* TCX @ 25.6/32 kHz -> ACELP */ )

#else

    if ( ( ( st->core == ACELP_CORE || st->core == AMR_WB_CORE ) && st->last_core == HQ_CORE ) || ( ( st->element_mode == IVAS_CPE_DFT || st->element_mode == IVAS_CPE_TD || ( st->element_mode == IVAS_CPE_MDCT && last_element_mode == IVAS_CPE_DFT ) ) && nchan_out == 2 &&

                                                                                                    st->core_brate != SID_2k40 && st->core_brate != FRAME_NO_DATA && ( last_core_brate_st0 == FRAME_NO_DATA || last_core_brate_st0 == SID_2k40 ) ) )

lib_enc/core_switching_enc.c

+5 −0
Original line number Diff line number Diff line
@@ -171,7 +171,12 @@ void core_switching_pre_enc( 
        st->uv_count = 0;

    }



#ifdef NONBE_1214_PLC_LSF_MEMORY

    if ( ( ( st->core == ACELP_CORE || st->core == AMR_WB_CORE ) && st->last_core == HQ_CORE ) || ( ( st->element_mode == IVAS_CPE_DFT || st->element_mode == IVAS_CPE_TD || ( st->element_mode == IVAS_CPE_MDCT && last_element_mode == IVAS_CPE_DFT ) ) && active_cnt == 1 ) ||

         ( st->core == ACELP_CORE && st->last_L_frame > L_FRAME16k && st->L_frame <= L_FRAME16k && st->element_mode > EVS_MONO ) /* TCX @ 25.6/32 kHz -> ACELP */ )

#else

    if ( ( ( st->core == ACELP_CORE || st->core == AMR_WB_CORE ) && st->last_core == HQ_CORE ) || ( ( st->element_mode == IVAS_CPE_DFT || st->element_mode == IVAS_CPE_TD || ( st->element_mode == IVAS_CPE_MDCT && last_element_mode == IVAS_CPE_DFT ) ) && active_cnt == 1 ) )

#endif

    {

        /* Reset the ACELP core in case of HQ->ACELP core switching */